The present invention relates to an integrated electric capacitor having a capacitor structure and a compensation structure and a method for producing the same. In particular, the present invention relates to trench capacitors structured on both sides for power-electronic applications.
During manufacturing processes of integrated circuits, mechanical tensions can occur in the semiconductor material, which can interfere or affect the production process itself (for example, due to bending of the wafer) or can also affect the electric characteristics of the integrated circuit in a spurious manner. Frequently, there is a connection, for example between the structures and thicknesses of deposited insulating layers (e.g. dielectrics) and the resulting mechanical tensions in the semiconductor material of the substrate (wafer).
This problem occurs in particular in integrated structured trench capacitors for power-electronic applications, whereby also the resulting operating voltage of such integrated capacitors for high-voltage applications is limited, or the obtainable layer thickness and/or the uniformity of the deposited dielectric are the limiting quantities for obtainable high-voltage operating ranges.
For increasing integration densities of electric circuits, enlargement of the capacitor surface, for example by hole or trench structures, is indispensable.
Mechanical tensions in monolithically integrated 3D capacitors with trench or hole structures for high operating voltages in the range of 600 V and above may be too high after the production or deposition of dielectric layers, i.e. so high that mechanical damages of the dielectric layers occur. Depositing the dielectric layer, for example an oxide, is performed partly at temperatures of beyond 1000° C. After thermal oxidation and during cooling of the substrate, for example a semiconductor substrate such as silicon, thermal tension occurs due to different coefficients of thermal extension between substrate and deposited and dielectric layer, e.g. between silicon and silicon dioxide. Silicon dioxide (SiO2) has, for example, a coefficient of thermal expansion of approximately 5.6×10−7 K−1, while silicon has a coefficient of thermal expansion of approximately 2.6×10−6 K−1. Thus, during cooling, a silicon substrate reduces its volume to a greater extent than a silicon oxide layer disposed thereon, which forms the dielectric layer. This can result in material tensions and deformations (tiltings) in the substrate and/or the dielectric layer.
Alternatively or additionally, an intrinsic mismatch between silicon dioxide layer and substrate due to different grid structures and volume expansions can result in further material tensions. A resulting bending of the substrates, for example semiconductor substrates, can again have the effect that the same cannot be processed further or that the insulating layers “break up” and lose their insulating effect. In such a case, the breakdown voltage of the capacitor (where a resistance drop in the capacitor occurs and results in a voltage drop—short circuit—in the capacitor) can fall below the operating voltage. With increasing thickness of the dielectric layers for increasing operating voltages, the mechanical tensions increase simultaneously. Deformations in a silicon wafer can, for example, have the effect that the wafer can no longer be received by an uptake and/or a chuck, for example a vacuum chuck for fixation in the production line and can hence not be processed further, for example since the deformation prevents a tightness for generating the vacuum. Alternatively or additionally, based on the bending, photolithography designed for planar surfaces (for example irradiation of a top or a bottom of the wafer) may be prevented, since bent wafers are not exposed correctly.
Thus, so far, no monolithic capacitors with operating voltages of more than 600 V can be realized in a manner suitable for mass production. Even in monolithic capacitors for operating voltages around 600 V, difficulties occur again and again during further processing with semiconductor technology processes due to the mechanical stress after deposition of the dielectrics. Thus, so far mostly ceramic or film capacitors are used for these operating voltages.
Monolithically integrated trench capacitors and RC snubbers (resistor (R)-capacitor (C)), i.e. 3D damping devices having a structure as shown in FIG. 8 comprise a structured front of the slice and a rear of the slice without structures having mechanical functions. In this regard, reference is made, for example, to U.S. Pat. No. 7,738,226.
Semiconductor technology and reliability of capacitors and RC devices in a voltage range between 200 V and 600 V has been described in detail in the literature, cf. [1, 2, 3].
Beyond that, capacitors have already been produced by monolithic integration for different applications and operating voltages, as described in [4].
Integrated capacitors that are suitable for mass production useable in integrated circuits and high-voltage applications and that can be operated with higher operating voltages, for example more than 600 V, more than 800 V or more than 1,000 V would be desirable, such that an array of ceramic or film capacitors can be omitted in circuits and integrated devices, and the respective circuits can be implemented in a more compact manner, i.e. with higher integration density.